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Cheap Video à la Lancaster and the back story re: my KIM-1 |
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Cheap Video and Lying To the Machine |
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Cheap Video is a means of outputting video without the need for DMA hardware or a Video Controller chip. Instead what's used is programmed I/O. The video is generated as the output of an actual program running on the computer. This would ordinarily be impossible (due to the very high data rate required), but Cheap Video has a trick up its sleeve, something devious done in hardware to fool the CPU. But first let's look at the software. At the heart of the video program is a loop. Each iteration of the loop outputs one row of pixels, corresponding to one horizontal sweep (or "scan") of the CRT monitor. Each iteration begins with the CPU making a Jump To Subroutine (JSR) to some address in a portion of memory defined as the video buffer. Rather than the pixel data, what the CPU "sees" in the buffer is a seemingly pointless subroutine composed of dozens of NOPs then an RTS. Naturally the CPU follows orders and executes these instructions. What's noteworthy is that the address bus increments steadily as the NOPs execute. In other words the CPU's Program Counter (PC) spends a few dozen cycles behaving like a 16-bit counter. And, it is counting its way through a portion of the video buffer. Following the RTS the spell is broken; we return to reality and procede through the rest of the loop. The CPU outputs a horizontal sync pulse, computes a new address for the next JSR to the video buffer, and then the loop reiterates. There's no exit until there have been enough scans (horizontal lines) to refresh the entire screen from top to bottom. This completes one frame. To produce a continuous succession of frames, an outer loop outputs the Vertical Sync pulse and rolls the JSR address back to its top-of-the-screen value before the inner loop commences again. Two incidental points: this description applies to bit-mapped displays. If a Character Generator ROM is used then each pixel line is part of a row of character cells, and the inner loop requires extra details I won't describe. Another option not discussed here is interlacing. The devious hardware hoax mentioned earlier is what causes the CPU to see the buffer area as containing NOPs rather than what's really there (the video data). Here's how it's done, and why: Usually when a CPU sends out an address, memory will faithfully reply with the byte stored at that address. But with Cheap Video a major connection — that between the data buses — gets temporarily severed. This lets Cheap Video "lie" about what's in memory. (See the diagrams on the left, Business as Usual and Cheap Video.) During each scan, the bytes fetched onto the memory data bus do not get relayed back to the CPU's data bus. Instead, the bytes of memory data (ie; the pixel data we needed to fetch) get merrily shipped off to the video display. Meanwhile, some Cheap Video flimflam logic feeds the CPU bus a brazen fabrication, a persistent NOP (and eventual RTS) which appear to reside at the addresses actually containing data. Lancaster realized that a microprocessor is easily capable of reading 32 or more bytes in a row, even though conventional processing of memory variables can only proceed sporadically and in much smaller chunks. But prolonged sequences of memory reads do occur as the chip fetches the bytes of its program. Broadly speaking we can say that, if there are no branches in a program and no accesses to memory variables, sequential reads for instruction fetching will continue indefinitely. Therefore NOPs yield the desired "scan" behavior: an extended sequence of back-to-back reads of ascending memory locations. The CPU unwittingly mimics a 16-bit counter or a DMA controller, with its address bus outputting an ascending 16-bit count. I am indebted to Mr Lancaster for the lesson I learned from Cheap Video, namely that a microprocessor can readily be manipulated by hardware tricks in order to produce unusual behaviors that are useful. The KimKlone, of course, relies very heavily on this principle. |
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