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• The 65C02 chip itself is rated for 4 Mhz. Nevertheless I found that the system would run reliably at 5. • How much additional benefit results from the FORTH enhancements? • Forth performance almost doubles — the speedup is about 89%, depending on the code mix. Forth words tend to be short; so, on an ordinary 65C02, Next (at 43 cycles) typically consumes more than half of the clock cycles. KK slashes Next from 43 cycles to 9. • Did the KK actually get used much, or was it mainly a demonstration? • Oh, it got used — yes, absolutely! For starters, all my projects using MCS-48 microcontrollers were developed on the KimKlone (or its predecessor, my KIM-1). I'd written an MCS-48 assembler (in Forth of course), and the Kims hosted my MCS-48 EPROM blaster device as well. Ditto for my work with the Diablo embedded CPU; I created an assembler and blasted EPROMs using the Kims. They also ran the disassembler and cross-reference searches that helped me reverse-engineer the Diablo printer embedded firmware in the first place. More prosaically, both Kims logged a lot of hours running an Exerciser program for shakedown tests. It was a necessary tool for the all the Diablo repair work I did. I could go on. The KK definitely earned its keep. • Does the memory space have a Zero-Page area in the bottom of every 64K bank? • No. When stack and Zero-Page addressing modes obtain, and also during fetches of X-Indirect and Indirect-Y pointers, KK overrides all the Pointer Registers and makes the access from bank zero. One of several good reasons for this is that it makes all banks other than bank zero a full and uninterrupted 64K in length, thus accommodating large data arrays which span multiple contiguous banks. • Is the KimKlone still in use? • No. For various reasons there came a point when I started using DOS and Windows boxes instead. The KK sat unused for a long while; then in 2000 I had occasion to fire it up and found it was functioning erratically. (Oxidation on an IC pin? Wirewrap socket?) I didn't attempt any repair then — and now it may be too late. The repair itself might turn out to be easy (or not); in any case I'm afraid there'd be an issue with remembering how to operate the KimKlone :o/ • What's the answer to the riddle about "how to keep the microcode in sync despite the CPU's timing variability from indirect-Y page crossings"? • Rather than syncing the microcode to the CPU, I did the reverse. Ordinarily an Indirect-Y read operation will take 5 or 6 cycles, depending on whether or not the Y indexing causes a page crossing. KK microcode asserts the 65C02 WAIT line in such a way that ALL Far Indirect-Y accesses take 6 cycles, page crossing or not. • What about the riddle of "how to make a VIA count up instead of down" ? • Well, I guess you could call it an undocumented feature of the 65C22 VIA. Or any binary counter. Up is down if you just reverse the logic sense! In other words let 0 volts represent logic 1, and let +5 volts be logic 0. To establish this reverse reality, the 65C22 has an inverting bus tranceiver (74HCT640) in the data bus that connects it to the rest of the system. You can write to the counter, and when you read it back you'll get the same value you put there. But when the counter decrements itself, to the outside world the change appears to be an increment. |
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